october 2010 doc id 16915 rev 2 1/10 10 BAT30F3 small signal schottky diode features very low conduction losses negligible switching losses low capacitance diode flip chip, 2-bump package complies with the following standards iec 61000-4-2 level 1: ? 2kv (air discharge) ? 2kv (contact discharge) description the BAT30F3 is a schottky diode in a 2-bump, flip-chip package. this device is specially suited for switching mode applications needing a low forward voltage drop diode. the electrical parameters are guaranteed across the operating temperature range (- 30 c to 85 c). figure 1. pin configuration (bump side) figure 2. schematic flip chip (2 bumps) 1 a b 1 a b www.st.com
characteristics BAT30F3 2/10 doc id 16915 rev 2 1 characteristics table 1. absolute maximum ratings (t amb = 25 c) symbol parameter value unit v pp peak pulse voltage: iec 61000-4-2 air discharge iec 61000-4-2 contact discharge 2 2 kv v rrm repetitive peak reverse voltage 20 v t stg storage temperature range (1) 1. condition to avoid thermal runaway for a diode on its own heatsink -55 to +150 c t op operating junction temperature range -30 to +85 c table 2. electrical characteristics symbol parameter test cond itions min. typ. max. unit i r (1) 1. pulse test: t p = 5 ms, < 2% reverse leakage current 25 c v r = 6 v - - 2 a v r = 20 v - - 6 55 c v r = 6 v - - 20 v r = 20 v - - 55 85 c v r = 6 v - - 145 v r = 20 v - - 360 v f forward voltage drop 25 c i f = 0.1 ma - - 200 mv i f = 1 ma - - 270 i f = 10 ma - - 340 i f = 100 ma - - 440 i f = 200 ma - - 500 i f = 300 ma - - 560 - 30 c i f = 0.1 ma - - 300 i f = 1 ma - - 355 i f = 10 ma - - 415 i f = 100 ma - - 495 i f = 200 ma - - 545 i f = 300 ma - - 600 dptot dtj < 1 rth(j-a)
BAT30F3 characteristics doc id 16915 rev 2 3/10 figure 3. leakage current versus reverse applied voltage (typical values) figure 4. forward voltage drop versus forward current (typical values, positive temperatures) i (a) r 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 0 5 10 15 20 25 30 tj=85c (maximum specified values) t j =-30c t j =25c t j =85c t j =55c t j =0c v (v) r 1.e-04 1.e-02 1.e-01 1.e+00 1.e-03 0.0 0.1 0.2 0.3 0.4 0.6 0.5 0.7 i (a) fm v (v) fm t j = 55 c t j = 85 c t j = 25 c figure 5. forward voltage drop versus forward current (typical values, negative temperatures) figure 6. relative variation of reverse leakage current versus junction temperature (typical values) i (a) fm 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 0.2 0.3 0.4 0.5 0.6 0.7 tj=-30c (maximum specified values) t j =-20c t j =-20c t j =-10c t j =-10c t j =-30c t j =-30c v (v) fm 1.e-02 1.e+00 1.e+01 1.e-01 1.e+02 t j (c) -30 -20 0 20 40 60 80 -10 10 30 50 70 90 i[t j ] / i [t j = 25 c] rr
ordering information scheme BAT30F3 4/10 doc id 16915 rev 2 2 ordering information scheme figure 7. ordering information scheme bat30 f3 signal schottky diode v = 20 v f = flip chip x = 3: lead-free, pitch = 400 m rrm package
BAT30F3 package information doc id 16915 rev 2 5/10 3 package information epoxy meets ul94, v0 lead-free packages in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. figure 8. package dimensions (dimensions in mm) g g 0.70 0.40 0.28 0.085 0.06 0.12 0.50 0.37 0.065 r 0.09 section g-g
pcb recommendations BAT30F3 6/10 doc id 16915 rev 2 figure 9. flip chip tape and reel specification (dimensions in mm) 4 pcb recommendations 4.1 design for optimum electrical performance and high ly reliable solder joints, stmicroelectronics recommends the pcb design recommendations listed in ta b l e 3 . note: a gold layer finishing on the pcb pad that is too thick (0.2 m maximum) is not recommended (low joint reliability). user direction of unreeling all dimensions in mm 4.0 0.1 2.0 0.05 8.0 0.3 2.0 0.1 1.75 0.1 3.5 - 0.05 ? 1.55 0.05 0.43 0.1 0.57 0.05 0.20 0.05 0.75 0.05 3 3 3 3 3 3 3 table 3. pcb design recommendations for solder bar pitch 400 m for nsmd pcb non solder mask defined oblong pad: 370 x 180 m ? micro via ssbu allowed ? micro via sbu to be avoided ? micro via sbu filled (under qualification) tr a c k : ? only one track per pad ? maximum track width = 100 m track layout must be symmetrical to the die axis (to homogenize stress and welding attraction during reflow assembly) for smd pcb solder mask defined oblong pad: ? micro via ssbu allowed ? micro via sbu to be avoided ? micro via sbu filled (under qualification) pcb pad finishing cu ? ni (2-6 m) - au (0.2 m max)
BAT30F3 pcb recommendations doc id 16915 rev 2 7/10 to optimize the natural self centering effect of csp on the pcb, pcb pad positioning and size have to be properly designed (see figure 10 ) micro vias an alternative to routing on the top surface is to route out on buried layers. to achieve this, the pads are connected to the lower layers us ing micro vias. only ssbu via technology is approved. figure 10. solder mask opening 370 m 370 m 100 m 450 m 180 m 180 m 255 m non solder mask defined solder mask defined
pcb recommendations BAT30F3 8/10 doc id 16915 rev 2 4.2 assembly for chip scale package mounting on the pcb, stmicroelectronics recommends the use of a solder stencil aperture of 330 x 330 m maximum and a typical stencil thickness of 75 or 80 m. chip scale packages are fully compatible with the use of near eutectic 95.5 sn, 4 ag, 0.5 cu solder paste with no-clean flux. st's recommendations for chip scale package board mounting are illustrated on the so ldering reflow profile shown in figure 11 . figure 11. st ecopack ? recommended soldering reflow profile for pcb mounting dwell time in the soldering zone (with temperature higher than 220 c) has to be kept as short as possible to prevent component and substrate damage. peak temperature must not exceed 260 c. controlled atmosphere (n2 or n2h2) is recommended during the whole reflow, especially above 150 c. chip scale packages are able to withstand three times the previous recommended reflow profile in order to be compatible with a double reflow when smds are mounted on both sides of the pcb and one additional repair. a maximum of three soldering reflows are allowed for these lead-free packages (with repair step included). the use of a no-clean flux is highly reco mmended to avoid any cleaning operation. to prevent any bump cracks, ultrasonic cleaning methods are not recommended. 0 01234567 time (min) temperature (c) 2c/s recommended 6c/s max 220c 125 c 260c max 255c 180c 90 sec max 10-30 sec 90 to 150 sec 3c/s max 0 01234567 time (min) temperature (c) 2c/s recommended 6c/s max 220c 125 c 260c max 255c 180c 90 sec max 10-30 sec 90 to 150 sec 3c/s max
BAT30F3 ordering information doc id 16915 rev 2 9/10 5 ordering information 6 revision history table 4. ordering information order code marking package weight base qty delivery mode BAT30F3 3 flip chip 0.3 mg 15000 tape and reel 7? table 5. document revision history date revision changes 14-dec-2009 1 initial release. 21-oct-2010 2 updated dot graphic in figure 1 .
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